Učni načrt predmeta

Predmet:
Sočasno načrtovanje strojne in programske opreme
Course:
Hardware/Software Codesign
Študijski program in stopnja /
Study programme and level
Študijska smer /
Study field
Letnik /
Academic year
Semester /
Semester
Informacijske in komunikacijske Računalniške strukture in sistemi 1 2
Information and Communication Computer Structures and Systems 1 2
Vrsta predmeta / Course type
Izbirni / Elective
Univerzitetna koda predmeta / University course code:
IKT2-697
Predavanja
Lectures
Seminar
Seminar
Vaje
Tutorial
Klinične vaje
work
Druge oblike
študija
Samost. delo
Individ. work
ECTS
15 15 15 105 5

*Navedena porazdelitev ur velja, če je vpisanih vsaj 15 študentov. Drugače se obseg izvedbe kontaktnih ur sorazmerno zmanjša in prenese v samostojno delo. / This distribution of hours is valid if at least 15 students are enrolled. Otherwise the contact hours are linearly reduced and transfered to individual work.

Nosilec predmeta / Course leader:
izr. prof. dr. Gregor Papa
Sodelavci / Lecturers:
Jeziki / Languages:
Predavanja / Lectures:
slovenščina, angleščina / Slovenian, English
Vaje / Tutorial:
Pogoji za vključitev v delo oz. za opravljanje študijskih obveznosti:
Prerequisites:

Zaključen študijski program prve stopnje s področja naravoslovja, tehnike ali računalništva.

Student must complete first-cycle study programmes in natural sciences, technical disciplines or computer science.

Vsebina:
Content (Syllabus outline):

Pregled sočasnega načrtovanja: kaj je sočasno načrtovanje ter zakaj je potrebno in pomembno.

Ciljne arhitekture: vgradni sistemi; splošno namenski procesorji, DSP, namenska vezja, FPGA, SoC.

Metode sočasnega načrtovanja: različni nivoji predstavitve modela; razdeljevanje strojnega in programskega dela; razvrščanje operacij in dodeljevanje gradnikov; upoštevanje nasprotujočih si omejitev; optimiranje programske kode.

Ocenjevanje: strojna, programska in celovita ustreznost sistema.

Codesign Overview: What is codesign – why is it necessary and important.

Target Architectures: Embedded systems; general purpose processors, DSP, ASIC, FPGA, SoC.

Codesign Methodologies: Different levels of model representation; hardware and software partitioning; operation scheduling and resource allocation; dealing with contradictory constraints; software code optimizations.

Estimation: Hardware, software and system as a whole suitability.

Temeljna literatura in viri / Readings:

Izbrana poglavja iz naslednjih knjig: / Selected chapters from the following books:
- S. Ha and J. Teich, Handbook of Hardware/Software Codesign, Springer, 2017, ISBN: 978-94-017-7267-9
- P.R. Schaumont, A Practical Introduction to Hardware/Software Codesign. Springer, 2013, ISBN: 978-1-4614-3736-9.
- M. Wolf, Computers as Components. Academic Press, 2012. ISBN 978-0123884367.
- P. Marwedel, Embedded System Design. Springer, 2011. ISBN: 978-94-007-0257-8.
- G. DeMicheli, R. Ernst, and W. Wolf, Readings in Hardware/Software Co-design. Morgan Kaufmann, 2001. ISBN: 978-1-55860-702-6.

Cilji in kompetence:
Objectives and competences:

Cilj predmeta je študentom posredovati teoretično in praktično znanje o sočasnem načrtovanju strojne in programske opreme. Uvodoma so predstavljeni osnovni strojni gradniki (procesorji, namenska vezja, programirljiva vezja), osnove programske opreme (način pisanja, sekvenčno in vzporedno izvajanje) ter njun medsebojni vpliv. Študij sočasnega načrtovanja se osredotoča na povezavo in soodvisnost med strojno in programsko opremo.

Slušatelji pridobijo osnovno teoretično razumevanje in praktične izkušnje s področja
sočasnega načrtovanja strojne in programske
opreme. Tovrstno znanje bo omogočilo uporabo
znanstvenih metod za reševanje zahtevnih
znanstveno-raziskovalnih nalog ter vodenja
razvojnih in raziskovalnih programov s ciljem
modernizacije in povečanja proizvodnje skozi
učinkovite vgrajene aplikacije.

The goal of this course is to provide to the students the theoretical and practical knowledge on hardware and software codesign. The course
introduces the major hardware structures (processors, application-specific circuits, programmable gate arrays), basics on software
approaches (description type, sequential and
parallel execution), and their mutual influence. The study of hardware/software codesign focuses on the close link-up and mutual influence between hardware and software.

The student will gain the basic theoretical understanding and practical experiences in the field of hardware/software codesign. Gained knowledge will allow the use of scientific methods for solving of complex scientific-research tasks, and guidance of development and research programs, with the goal of modernization and production growth through
the efficient embedded applications.

Predvideni študijski rezultati:
Intendeded learning outcomes:

Študenti bodo z uspešno opravljenimi obveznostmi tega predmeta pridobili:
- sposobnost analize, sinteze in predvidevanja
rešitev ter posledic,
- sposobnost uporabe znanja v praksi,
- avtonomnost v strokovnem delu,
- sposobnost izbrati ustrezno razmerje strojne in
programske opreme ter ju povezati v učinkovit
celovit sistem,
- sposobnost optimizirati programsko opremo
ob upoštevanju izbrane strojne opreme,
- sposobnost integrirati znanja z različnih
področij pri reševanju specifičnih realnih
problemov.

Students successfully completing this course will
acquire:
- An ability to analyse, synthesise and anticipate
solutions and consequences;
- An ability to apply the theory in to a practice;
- An autonomy in the professional work;
- An ability to select suitable hardware and
software and connect them into the efficient
system;
- An ability to optimize the software regarding
the selected hardware;
- An ability to integrate the knowledge from
different fields to solve specific real-world
problems.

Metode poučevanja in učenja:
Learning and teaching methods:

Predavanja, seminar, konzultacije, individualno
delo

Lectures, seminar, consultations, individual work

Načini ocenjevanja:
Delež v % / Weight in %
Assesment:
Seminarska naloga
50 %
Seminar work
Ustni zagovor seminarske naloge
50 %
Oral defense of seminar work
Reference nosilca / Lecturer's references:
1. RAUT, Gopal, BIASIZZO, Anton, DHAKAD, Narendra, GUPTA, Neha, PAPA, Gregor, VISHVAKARMA, Santosh Kumar. Data multiplexed and hardware reused architecture for deep neural network accelerator. Neurocomputing. [Print ed.]. 2022, vol. 486, pp. 147-159, DOI: 10.1016/j.neucom.2021.11.018.
2. BIASIZZO, Anton, KOROUŠIĆ-SELJAK, Barbara, VALENČIČ, Eva, PAVLIN, Marko, SANTO-ZARNIK, Marina, BLAŽICA, Bojan, O'KELLY, Damian, PAPA, Gregor. An open-source approach to solving the problem of accurate food-intake monitoring. IEEE access. 2021, vol. 9, pp. 162835-162846, DOI: 10.1109/ACCESS.2021.3128995.
3. PAPA, Gregor, SANTO-ZARNIK, Marina, VUKAŠINOVIĆ, Vida. Electric-bus routes in hilly urban areas: overview and challenges. Renewable & sustainable energy reviews, 2022, vol. 165, pp. 112555-1-112555-19, DOI: 10.1016/j.rser.2022.112555.
4. JAKOVLJEVIĆ, Tamara, JANKOVIĆ, Milica, SAVIĆ, Andrej, SOLDATOVIĆ, Ivan, TODOROVIĆ, Petar, JERE JAKULIN, Tadeja, PAPA, Gregor, KOVIČ, Vanja. The sensor hub for detecting the developmental characteristics in reading in children on a white vs. colored background/colored overlays. Sensors. 2021, vol. 21, no. 2, pp. 406-1-406-13, DOI: 10.3390/s21020406.
5. VREČA, Jure, IVANOV, Iva, PAPA, Gregor, BIASIZZO, Anton. Detecting network intrusion using binarized neural networks. In: 2021 IEEE 7th World Forum on Internet of Things (WF-IoT), hibrid event, virtual and in person, 14 June-31 July 2021, New Orleans, LA, USA. IEEE, 2021. pp. 622-627. ISBN 978-1-6654-4431-6, ISBN 978-1-6654-4432-3, DOI: 10.1109/WF-IoT51360.2021.9595961.